Subject

Co-promoter: Prof. An Braeken

Kind of work

The main objective of this thesis is to design and implement a control traffic aware scheduler for TSCH-enabled networks. The specific goals include:
? Understanding the challenges and requirements of scheduling control traffic in TSCH networks
? Extending the existing Orchestra scheduler to prioritize control traffic efficiently
? Evaluating the performance of the implemented scheduler using the Cooja simulator
? Deploying the scheduler on a real testbed to validate its performance in practical scenarios
? Assessing the performance of the control traffic scheduler in terms of latency, reliability, etc.

Framework of the Thesis

S. Kharb and A. Singhrova, ‘A survey on network formation and scheduling algorithms for time slotted channel hopping in industrial networks’, Journal of Network and Computer Applications, vol. 126, pp. 59–87, 2019.

part of a real testbed initiative for engineering students.

Expected Student Profile

Programming Skills: The student should have intermediate C programming language skills.
Networking Knowledge: The student should be/become familiar with TSCH and TSCH dedicated schedulers like Orchestra.
Operating Systems and Embedded Systems: The student should be/become familiar with operating systems designed for LLNs, such as Contiki-NG, and embedded systems.
Simulation Tools: Experience with simulation tools like Cooja, which is commonly used with Contiki-NG, would be valuable. The student should be comfortable setting up simulations, configuring network parameters, and analyzing simulation results to evaluate protocol performance and working with real nodes and associated testbeds.