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Performance and Programming Environment of a Combined GPU/FPGA Desktop Host Publication: Transition of HPC Towards Exascale Computing Authors: B. da Silva Gomes, A. Braeken, E. D'hollander, A. Touhafi, J. G Cornelis and J. Lemeire Publisher: IOS Press Publication Year: 2013 Number of Pages: 17 ISBN: 978-1-61499-323-0
Abstract: The performance and the versatility of today's PCs exceeds many times the power of the fastest number crunchers in the 90s. Yet the computational hunger of many scientific applications has led to the development of GPU- and FPGA-accelerator cards. In this paper the programming environment and the performance analysis of a super desktop with a combined GPU/FPGA architecture is presented. A unified roofline model is used to compare the performance of the GPU and the FPGA taking into account the computational intensity of the algorithm and the resource consumption. The model is validated by two image processing kernels which are compiled using OpenCL for the GPU and a C-to-VHDL compiler for the FPGA. It is shown that an FPGA compiler outperforms handwritten code and is highly productive, but also uses more resources. While both the GPU and FPGA excel in particular applications, both devices suffer from the limited I/O bandwidth to the processor. External Link.
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