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A +70-dBm IIP3 Electrical-Balance Duplexer for Highly Integrated Tunable Front-Ends This publication appears in: IEEE Transactions on Microwave Theory and Techniques Authors: B. Van Liempd, B. Hershberg, S. Ariumi, K. Raczkowski, K. Bink, U. Karthaus, E. Martens, P. Wambacq and J. Craninckx Volume: 64 Issue: 12 Pages: 4274-4286 Publication Date: Dec. 2016
Abstract: An electrical-balance duplexer achieving the state-of-the-art linearity and insertion loss (IL) performance is presented, enabled by a partially depleted RF silicon-on-insulator CMOS technology. A single-ended configuration avoids the common-mode isolation problem suffered by topologies with a differential low-noise amplifier. Highly linear switched capacitors allow for impedance balancing to antennas with <1.5:1 voltage standing wave ratio from 1.9 to 2.2 GHz. +70-dBm input-referred third-order intercept point is achieved under high transmitter (TX) power (+30.5 dBm max.). TX IL is <3.7 dB, and receiver IL is <3.9 dB. External Link.
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