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A 0.7-1.15GHz Complementary Common-Gate LNA in 0.18µm SOI CMOS with +15dBm IIP3 and >1kV HBM ESD Protection Host Publication: European Solid-State Circuits Conference Authors: B. Van Liempd, S. Ariumi, E. Martens, S. Chen, P. Wambacq and J. Craninckx Publisher: IEEE Publication Date: Sep. 2015 Number of Pages: 4 ISBN: 978-1-4673-7470-5
Abstract: IM3 cancellation is a popular technique in LNAs to achieve very high linearity, but is also very sensitive to the exact device (bias) operating point. A 0.7ǃ.15GHz complementary common-gate LNA in 0.18µm silicon-on-insulator CMOS is presented that achieves good out-of-band (OOB) linearity without IM3 cancellation. Measurements of the 0.9mm2 prototype show a gain of >7dB, an NF of <2.3dB, more than +15dBm OOB IIP3 and over 0dBm B1dB. Compared to other work, this LNA has a similar or better linearity at only 10mW. The LNA uses a nominal supply of 2.5V, but was tested up to 3.7V and showed no significant degradation of its linearity for ±400mV supply variations. A power clamp, designed to enable testing at higher core supply voltage, withstands a >2.6kV HBM discharge, while the overall circuit is protected for >1kV HBM discharges.
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