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A low-power 57-to-66GHz transceiver in 40nm LP CMOS with -17dB EVM at 7Gb/s Host Publication: 2012 IEEE International Solid-State Circuits Conference (ISSCC) Authors: V. Vidojkovic, G. Mangraviti, K. Khalaf, V. Szortyka, K. Vaesen, W. Van Thillo, B. Parvais, M. Libois, S. Thijs, J. Long, C. Soens and P. Wambacq Publisher: Mira Digital Publishing Publication Date: Feb. 2012 Number of Pages: 2 ISBN: 978-1-4673-0373-6
Abstract: A direct-conversion transceiver in 40nm digital LP CMOS for 57ᇖGHz wireless communication is described. In TX mode the IC consumes 185mW with 10.2dBm P1dB. In RX mode consumption is 130mW with a NF of 5.5dB and 30dB gain. The frequency generation uses a subharmonically injection-locked QVCO with 8GHz locking range over the 57ᇖGHz band. ESD robustness is more than 4kV HBM. The transceiver achieves ᆥdB EVM for QAM16 modulation in the 4 channels specified by IEEE 802.15.3c standard. External Link.
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