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ESD Protection for 5.5 GHz LNA in 90 nm RF CMOS - Implementation Concepts, Constraints and Solutions Host Publication: Finds and Results from the Swedish Cyprus Expedition: A Gender Perspective at the Medelhavsmuseet Authors: S. Thijs, M. Iyer Natarajan, D. Linten, V. Vassilev, T. Daenen, A. Scholten, R. Degraeve, P. Wambacq and G. Groeseneken Publication Date: Sep. 2004 Number of Pages: 10
Abstract: Design and implementation of ESD protection for a 5.5 GHz Low Noise Amplifier (LNA) fabricated in a 90 nm RF CMOS technology is presented. An on-chip inductor, added as 'plug-and-play',is used as ESD protection for the RF pins. The consequences of design and process, as well as the limited freedom on the ESD protection implementation for all pins to be protected are presented in detail and additional improvements are suggested.
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