An FPGA-based Real-Time Event Sampler Host Publication: RECONFIGURABLE COMPUTING: ARCHITECTURES, TOOLS AND APPLICATIONS Authors: N. Penneman, L. Perneel, M. Timmerman and B. De Sutter Publisher: SPRINGER-VERLAG BERLIN, HEIDELBERGER PLATZ 3, D-14197 BERLIN, GERMANY Publication Year: 2010 Number of Pages: 8 ISBN: 978-3-642-12132-6
Abstract: This paper presents the design and FPGA-implementation of a sampler that is suited for sampling real-time events in embedded systems. Such sampling is useful, for example, to test whether real-time events are handled in time on such systems. By designing and implementing the sampler as a logic analyzer on an FPGA, several design parameters can be explored and easily modified to match the behavior of different kinds of embedded systems. Moreover, the trade-off between price and performance becomes easy, as it mainly exists of choosing the appropriate type and speed grade of an FPGA family. External Link.
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