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An ESD-Protected DC-to-6GHz 9.7mW LNA in 90nm Digital CMOS Host Publication: Finds and Results from the Swedish Cyprus Expedition: A Gender Perspective at the Medelhavsmuseet Authors: J. Borremans, P. Wambacq and D. Linten Publication Date: Feb. 2007 Number of Pages: 2
Abstract: A low cost 50x35um2, DCLj GHz LNA has been designed in digital 90nm CMOS. It consumes 8.1 mA from a 1.2 V supply, for a minimum NF of 2.5 dB and 17 dB of gain. In the 6 GHz bandwidth, S11 is below ᆞ dB and the IIP3 varies between ᆤ and lj dBm. ESD protection of 3.2 kV HBM is implemented, as well as an optional second stage with gain selection adding up to 4dB of gain.
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