Compact implementation of CCM and GCM modes of AES using DSP blocks Host Publication: 2013 23rd International Conference on Field programmable Logic and Applications Authors: A. De La Piedra, A. Braeken and A. Touhafi Publisher: IEEE Publication Date: Sep. 2013
Abstract: In this manuscript, we have explored how the use of DSP
blocks in the implementation of two authenticated-encryption
modes of AES can optimize the PAR figures. Our results
reflect that a 20.98 % reduction in slice utilization can be
achieved at a throughput higher than 25 Mbps (12 MHz) in
the Artixlj XC7A200TL FPGA.
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