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A 54-64.8 GHz Subharmonically Injection-Locked Frequency Synthesizer with Transmitter EVM between -26.5 dB and -28.8 dB in 28 nm CMOS Host Publication: 43rd European Solid-State Circuits Conference Authors: C. Tsai, G. Mangraviti, Q. Shi, K. Khalaf, A. Bourdoux and P. Wambacq UsePubPlace: Leuven Publisher: IEEE Publication Year: 2017 Number of Pages: 4
Abstract: The 60 GHz frequency synthesizer presented here demonstrates a transmitter error vector magnitude (EVM) between -28.8 and -26.5 dB, from 54 to 64.8 GHz, in 28 nm digital CMOS technology. This is suitable for IEEE 802.11 communications with coded datarates up to 6.4 Gb/s. Its architecture, based on subharmonic injection locking, is immune to pulling by the power amplifier. A 24 GHz phase-locked loop, designed for low phase noise, locks a 60 GHz quadrature oscillator. The phase noise of the resulting 60 GHz carrier is between -96.5 and -93.8 dBc/Hz at 1 MHz offset. The frequency synthesizer, consuming 107 mW, is integrated and demonstrated with a 60 GHz transmitter front end. External Link.
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