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Trap-Aware Compact Modeling and Power-Performance Assessment of III-V Tunnel FET Host Publication: Trap-Aware Compact Modeling and Power-Performance Assessment of III-V Tunnel FET Authors: B. Parvais, Y. Xiang, D. Yakimets, s. sant, E. Memisevic, m. garcia bardon, a. verhulst, A. Schenk, L. Wernersson and G. Groeseneken Publication Year: 2018
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