|
C. Tsai, Z. Zong, F. Pepe, G. Mangraviti, J. Craninckx and P. Wambacq, Analysis of a 28-nm CMOS Fast-Lock Bang-Bang Digital PLL With 220-fs RMS Jitter for Millimeter-Wave Communication, IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 55, no. 7, pp. 1854-1863, May. 2020.
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