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@InProceedings{Pub_10526, author = {B. Parvais, L. Peng, L. Teugels, E. Rosseel, A. Vandooren, J. Franco, A. Walke, V. Desphande, F. M. Bufler, N. Rassoul, G. Hellings, G. Jamieson, F. Inoue, G. Verbinnen, E. Vecchio, T. Zheng, W. Vanherle, A. Hikavyy, B. T. Chan, R. Ritzenthaler, G. Besnard, W. Schwarzenbach, G. Gaudin, I. Radu, N. Waldron, V. De Heyn, D. Mocuta and N. Collaert}, title={3D sequential stacked planar devices on 300 mm wafers featuring replacement metal gate junction-less top devices processed at 525°C with improved reliability}, booktitle = {38th IEEE Symposium on VLSI Technology, VLSI Technology 2018}, publisher = {Institute of Electrical and Electronics Engineers Inc}, month={Oct}, year={2018}, pages={2} }
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