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A digital intensive circuit for low-frequency noise monitoring in 28nm CMOS Host Publication: Solid-State Circuits Conference (A-SSCC), 2015 IEEE Asian Authors: B. Parvais, P. Wambacq, A. Mercha, D. Verkest, A. Thean, M. Sawada, K. Nomoto, T. Oishi and H. Ammo Publisher: IEEE Publication Year: 2015
Abstract: A test monitor circuit for low-frequency noise characterization is demonstrated in 28nm CMOS technology. The circuit allows a fast evaluation of the low frequency noise performance of transistors, providing a digital output. The VCO-based quantizer used for analog to digital conversion is capable of converting signal of small amplitude, in the µV range. A good agreement between the results obtained with the proposed circuit and standard measurements techniques is obtained.
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